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INTEGRATED CIRCUITS
DATA SHEET
TDA8706 6-bit analog-to-digital converter with multiplexer and clamp
Preliminary specification Supersedes data of February 1992 File under Integrated Circuits, IC02 1996 Aug 20
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
FEATURES * 6-bit resolution * Binary 3-state TTL outputs * TTL compatible digital inputs * 3 multiplexed video inputs * Luminance and colour difference clamps * Internal reference * 300 mW power dissipation * 20-pin plastic package. APPLICATIONS * General purpose video applications * Y, U and V signals * Colour Picture-in-Picture (PIPCO) for TV * Videophone * Frame grabber. QUICK REFERENCE DATA Measured over full voltage and temperature ranges. SYMBOL VCCA VCCD ICCA ICCD ILE DLE fCLK Ptot Tamb PARAMETER analog supply voltage (pin 2) digital supply voltage (pin 10) analog supply current (pin 20) digital supply current (pin 10) integral linearity error DC differential linearity error maximum clock frequency total power dissipation operating ambient temperature range 4.5 4.5 - - - - 20 - 0 MIN. TYP. 5.0 5.0 32 28 - - - 300 - FUNCTIONAL DESCRIPTION GENERAL DESCRIPTION
TDA8706
The TDA8706 is a monolithic bipolar 6-bit Analog-to-Digital Converter (ADC) with a 3 analog input multiplexer and a clamp. All digital inputs and outputs are TTL compatible. Regulator with good temperature compensation.
The TDA8706 is a `like-flash' converter which produces an output code in one clock period. The device can withstand a duty clock cycle of 50 to 66.6% (clock HIGH). Luminance clamping level is fitted with 00H code (output 000000). Chrominance clamping level is fitted with 20H code (output 100000).
MAX. 5.5 5.5 39 37 0.75 0.5 - 418 +70 V V
UNIT
mA mA LSB LSB MHz mW C
ORDERING INFORMATION TYPE NUMBER TDA8706 TDA8706T PACKAGE NAME DIP20 SO20 DESCRIPTION plastic dual in-line package; 20 leads (300 mil) plastic small outline package; 20 leads; body width 7.5 mm VERSION SOT146-1 SOT163-1
1996 Aug 20
2
Preliminary specification
TDA8706
Fig.1 Block diagram.
handbook, full pagewidth
1996 Aug 20
clock input 13 14 chip enable 15 D5 16 D4 17 MULTIPLEXER 18 6-BIT ADC TTL OUTPUTS D3
BLOCK DIAGRAM
Philips Semiconductors
chrominance input
5
CHROMINANCE CLAMP
chrominance input D2
6
6-bit analog-to-digital converter with multiplexer and clamp
CHROMINANCE CLAMP
digital voltage outputs
19
D1
3
20 D0 REGULATOR 2 VCCA C select inputs B A reference voltage TOP reference voltage BOTTOM VCCD 11 8 9 10 3 4 1 ground
MCD267
luminance input
7
12
LUMINANCE CLAMP
clamp input
TDA8706
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
PINNING SYMBOL PIN GND VCCA VRT VRB INC INB INA C B A VCCD CLAMP CLK CE D5 D4 D3 D2 D1 D0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ground analog positive supply (+5 V) reference voltage TOP decoupling reference voltage BOTTOM decoupling chrominance input chrominance input luminance input select input select input select input digital positive supply voltage (+5 V) damp pulse input (positive pulse) clock input chip enable (active LOW) digital voltage output: most significant bit (MSB) digital voltage output digital voltage output digital voltage output digital voltage output digital voltage output: significant bit (LSB) Fig.2 Pin configuration.
handbook, halfpage
TDA8706
DESCRIPTION
GND V CCA V RT VRB INC INB INA C B
1 2 3 4 5
20 D0 19 D1 18 D2 17 D3 16 D4
TDA8706
6 7 8 9 15 D5 14 CE 13 CLK 12 CLAMP 11 VCCD
MCD266
A 10
1996 Aug 20
4
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL VCCA VCCD VCCA - VCCD VI IO Tstg Tamb HANDLING PARAMETER analog supply voltage range (pin 2) digital supply voltage range (pin 10) supply voltage difference input voltage range output current storage temperature range operating ambient temperature range MIN. -0.3 -0.3 1.0 -0.3 - -55 0
TDA8706
MAX. +7.0 +7.0 - +7.0 10 +150 +70 V V V V
UNIT
mA C C
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits.
1996 Aug 20
5
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
TDA8706
CHARACTERISTICS (see Tables 1 and 2) VCCA = 4.5 to 5.5 V; VCCD = 4.5 to 5.5 V = VCCD; Tamb = 0 to +70 C; CVRB = CVR1 = 100 nF; Typical values measured at VCCA = VCCD = 5 V and Tamb = 25 C; unless otherwise specified. SYMBOL Supply VCCA VCCD ICCA ICCD Inputs CLOCK INPUT (PIN 13) VIL VIH IIL IIH ZI Ci VIL VIH IIL IIH VRT VRB LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current input impedance input capacitance VCLK = 0.4 V VCLK = 2.7 V fCLK = 20 MHz fCLK = 20 MHz 0 2.0 -400 - - - 0 2 VCLK = 0.4 V VCLK = 2.7 V -400 - - - - - 4 2 - - - - 0.8 VCCD - 100 - - 0.8 VCCD - 20 V V A A k pF analog supply voltage (pin 2) digital supply voltage (pin 10) analog supply current (pin 2) digital supply current (pin 10) 4.5 4.5 - all outputs at LOW level - 5.0 5.0 32 28 5.5 5.5 39 37 V V mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
A, B, C, CLAMP AND CEN INPUTS (PINS 8, 9, 10, 12 AND 14) LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current V V A A
Reference voltage (pins 3 and 4) reference voltage TOP decoupling reference voltage BOTTOM decoupling 3.22 1.84 1.36 3.35 1.9 1.435 3.44 1.96 1.48 V V V
VRT - VRB reference voltage TOP - BOTTOM decoupling Analog inputs INA, INB, INC (pins 7, 6 and 5) VI(p-p) ZI Cclamp input voltage amplitude (peak-to-peak value) input impedance coupling clamp capacitance fi = 4.43 MHz
840 100 1 - - - - -
900 - 10 - -45 0.4 1.0 -30
940 - 1000
mV k nF
Analog signal processing (pins 5, 6 and 7) (fCLK = 20 MHz) f1 fall Gdiff diff SVRR fundamental harmonics (full scale) harmonics (full scale); all components differential gain differential phase supply voltage ripple rejection fi = 4.43 MHz fi = 4.43 MHz note 1 note 1 note 2 0 - - - - dB dB % deg dB
1996 Aug 20
6
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
SYMBOL Outputs DIGITAL VOLTAGE OUTPUTS (PINS 15 TO 20) (see Table 2) VOL VOH IOZ LOW level input voltage HIGH level output voltage output current in 3-state mode IO = 1 mA IO = 0.5 mA 0.4 V < VO < VCCD 0 2.7 -20 - - - PARAMETER CONDITIONS MIN. TYP.
TDA8706
MAX.
UNIT
0.4 VCCD +20
V V A
Switching characteristics CLOCK TIMING (see Fig.3) fCLK fmux tCLK tLOW tHIGH tCLR tCLF tS tr tf tCLPS tCLPH tCLPP td tDH ILE DLE AILE EB Timing DIGITAL OUTPUTS Tdt Tsto 3-state delay time sampling time offset see Fig.6 - - 16 2 25 - ns ns maximum clock frequency maximum multiplexing frequency period duty cycle LOW time HIGH time rise time fall time CLK = VIH at 50% at 50% at 10 to 90% at 90 to 10% 20 10 50 45 16 22.5 4 4 - - - 50 - - 6 6 - 6 6 - - 3 15 - - - - 5.7 - - - 66.6 - - - - - - - - - - 24 - 0.75 0.5 2 - s ns ns MHz MHZ ns % ns ns ns ns
Select signals, Clamp, Data (see Figs 4 and 5) set-up time select A, B and C rise time A, B and band C fall time A, B and band C set-up time clamp asynchronous hold time clamp asynchronous clamp pulse data output delay time data hold time CCLP = 10 nF at 10 to 90% at 90 to 10% 35 4 4 0 0 - - 12 - - note 3 note 3 - - ns ns ns
Transfer function DC integral linearity error DC differential linearity error AC integral linearity error effective bits LSB LSB LSB bits
1996 Aug 20
7
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
Notes to the characteristics
TDA8706
1. Low frequency ramp signal (VVI(p-p) = 1.8 V and fi = 15 kHz) combined with a sinewave input voltage (VVI(p-p) = 0.5 V and fi = 4.43 MHz) at the input. 2. Supply voltage ripple rejection (SVRR): variation of the input voltage produces output code 31 for a supply voltage variation of 1 V. V Vi ( 31 ) SVRR = 20 log ---------------------V CCA 3. Full-scale sinewave; fi = 4.43 MHz, fCLK = 20 MHz. Table 1 Output coding VI(1) STEP (TYP. VALUE) Underflow 0 1 . . . 62 63 Overflow Note 1. With clamping capacitance. Table 2 Mode selection D0 TO D5 high impedance active; binary 3.072 V 3.086 V >3.1 V <2.2 V 2.2 V 2.215 V BINARY OUTPUTS D5 TO D0 000000 000000 000001 ...... ...... ...... 111110 111111 111111 Note 1. X = don't care. Table 4 B/C 0 1 Clamp input B and C CLAMP 1 1 DIGITAL OUTPUTS X(1) 32 VinB/VinC 2.65 2.65 Note 1. X = don't care. Table 3 A 0 1 Clamp input A CLAMP 1 1 DIGITAL OUTPUTS X(1) 0 VinA 2.2 2.2
CEN 1 0
1996 Aug 20
8
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
TDA8706
handbook, full pagewidth
90% 50% 10% t CLF t CLH t CLP t CLL t CLR
VIH
VIL
MCD268
Fig.3 AC clock characteristics.
handbook, full pagewidth
CLK
tS A
B
C
t DH CLAMP
t CLPS
t CLPH
t CLPP td OUTPUT DATA DATA C DATA A DATA B DATA C
MCD269 - 1
Fig.4 AC characteristics select signals; Clamp, Data.
1996 Aug 20
9
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
TDA8706
handbook, full pagewidth
- (B -Y) (C input) digital outputs = 100000
- (R -Y) (B input)
digital outputs = 100000
Y (A input)
digital outputs = 000000
CLAMP input
1 0
MCD270
Fig.5 AC characteristics select signals; Clamp, Data.
Table 5
Clamp characteristic related to TV signals PARAMETER MIN. 2.2 - 3 TYP. 3.0 MAX. 3.3 10 UNIT s lines
Clamping time per line (signal active) Input signals clamped to correct level after
1996 Aug 20
10
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
TDA8706
handbook, full pagewidth
CE input
reference level (1.3 V) 2.4 V
data outputs 0.4 V t dHZ t dLZ t dZH t dZL
MGD690
Fig.6 Timing diagram of 3-state delay.
1996 Aug 20
11
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
APPLICATION INFORMATION
TDA8706
Additional application information will be supplied upon request (please quote reference number FTV/9112).
handbook, full pagewidth
1 2 22 nF 3 22 nF 4 INC INB INA C C B C A C 5
20 19 18 17 16
TDA8706
6 7 8 9 10 15 14 13 12 11
MGA230
clock signal C
(1) `C' capacitors must be determined on the output capacitance of the circuits driving A, B and C or CLK pins. (2) VRB and VRT are decoupling pins for the internal reference ladder. Do not draw current from these pins in order to achieve good linearity. (3) Analog and digital supplies should be separated and decoupled.
Fig.7 Application diagram.
1996 Aug 20
12
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
PACKAGE OUTLINES DIP20: plastic dual in-line package; 20 leads (300 mil)
TDA8706
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC EIAJ SC603 EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-05-24
1996 Aug 20
13
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
TDA8706
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013AC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-24
1996 Aug 20
14
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TDA8706
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Aug 20
15
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with multiplexer and clamp
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8706
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Aug 20
16

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